Recent News
November 23, 2015

Altera Functional Safety Package Combines FPGA Flexibility with “Lockstep” Processor Solution to Reduce Risk and Time-to-Market

Altera today announced the availability of the Altera® Functional Safety Lockstep solution for the Nios® II embedded processor, a solution that reduces risk in design cycles and helps system designers simplify certification for industrial and automotive safety applications. The joint Altera and YOGITECH lockstep solution is built using Altera FPGAs, SoCs, and certified tool flows, along with intellectual property (IP) cores from YOGITECH, a functional safety leader based in Pisa, Italy. This solution enables customers to easily implement SIL3 safety designs in Altera FPGAs, including the low-cost Cyclone® V FPGA and MAX® 10 FPGA families. The solution is being demonstrated at the SPS IPC Drives conference in Nuremberg, Germany, from November 24 to 26 at the Altera stand (Hall 3, Stand #270). Learn more about the Altera solutions for functional safety, industrial automation, and industrial Ethernet at

November 17, 2015

Altera to Exhibit FPGA and SoC Solutions for Industry 4.0 and IoT at SPS IPC Drives 2015

Altera is demonstrating industrial solutions based on its Altera® Cyclone® V and MAX® 10 field-programmable gate arrays (FPGAs) and SoCs at the SPS IPC Drives conference in Nuremberg, Germany, from November 24 to 26, (Hall 3, Stand 270). Visitors to the Altera stand will discover the cost and performance advantages that Altera’s latest solutions for Industry 4.0 and IoT bring to their next-generation industrial electronic systems designs. (more)

November 12, 2015

Altera Demonstrates FPGA-based Data Center and Search Acceleration Solutions at Supercomputing 2015

Altera is demonstrating FPGA acceleration using its leading-edge FPGAs and SoCs at Supercomputing 2015 (Booth 462), being held November 15 to 20 at the Austin Convention Center, Austin, Texas. Altera will demonstrate how the Altera® software development kit (SDK) for Open Computing Language (OpenCL™), combined with its portfolio of FPGAs and SoCs, can help designers achieve high-performance, power-efficient system acceleration. Altera’s Michael Strickland, director in the Computer and Storage business, will also appear on a panel: SC15:  Reconfigurable Supercomputing on Tuesday, November 17, from 5:30-7:00 p.m., in room 16AB. (more)

November 12, 2015

Altera FPGAs Accelerate Servers at Texas Advanced Computing Center

Programmable logic technology from Altera Corporation is now in place inside a new, advanced server cluster at the Texas Advanced Computing Center (TACC) at The University Texas at Austin, which seeks to help researchers and academia to run complex algorithmic-based research. Microsoft Research shared more about the server cluster becoming available for research use at TACC, in a blog post today: Altera field programmable gate arrays (FPGAs) are used as accelerators on the Microsoft Project Catapult board, and turn commodity servers into high-performance, power-efficient machines.


November 09, 2015

Altera Discloses Industry’s First Heterogeneous SiP Devices that Integrate HBM2 DRAM with FPGAs

Altera today disclosed the industry’s first heterogeneous System-in-Package (SiP) devices that integrate stacked High-Bandwidth Memory (HBM2) from SK Hynix with high-performance Stratix® 10 FPGAs and SoCs. Stratix 10 DRAM SiP represents a new class of devices that are specifically architected to meet the most demanding memory bandwidth requirements in high-performance systems. (more)

November 02, 2015

Altera’s New Quartus Prime Design Software Extends Leadership in Design Performance and Productivity

Signaling a new era in design productivity for a new generation of programmable logic devices, Altera Corporation today released the Quartus® Prime design software. Altera’s new software environment builds upon the company’s proven, user-friendly Quartus II software and incorporates the new productivity-centric Spectra-Q™ engine. The new Quartus Prime design software is optimized to enhance the FPGA and SoC FPGA design process by reducing design iterations, delivering the industry’s fastest compile times, and accelerating silicon performance. (more)

October 30, 2015

Altera Demonstrates Data Center Acceleration Solutions at FIA Futures & Options Expo

Altera is demonstrating how its field programmable gate arrays (FPGAs) can enable system acceleration in trading and regulatory environments at the FIA Futures & Options Expo taking place November 3-5, 2015, at the Chicago Hilton (Green Hall, Booth #107). This industry event focuses on the technology requirements and critical issues associated with the financial derivatives market. Altera, along with partner REFLEX CES, is showcasing ultra-low latency networking and acceleration of 10 Gigabit Ethernet (10GbE) using an Arria® 10 FPGA, which enables tremendous performance potential. (more)

October 29, 2015

Altera Receives Global FPGA Technology Innovation Leadership Award From Frost & Sullivan

Altera has received the Global FPGA Technology Innovation Leadership Award from analyst firm Frost & Sullivan, ranking Altera above its competitors in the categories of technology attributes, and  future business value. The award highlights Altera’s implementation of IEEE 754 single-precision hardened floating point DSP (digital signal processing) blocks in its Arria® 10 FPGAs--enabling a processing rate of up to 1.5 TFLOPS (Tera floating point operations per second) offering greater energy efficiency and productivity in digital system design. Altera’s programmable devices enable customers to optimize their designs in big data and search applications, data center acceleration, military communications and high performance computing, which need more precise calculations. Download the award summary report at (more)

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