|
May 21, 2013
Altera Stratix V GX FPGAs Achieve PCIe Gen3 Compliance and Listing on PCI-SIG Integrators ListAltera today announced its 28 nm Stratix® V GX FPGAs have achieved inclusion on the latest PCI-SIG® Integrators Listfor the PCI Express® (PCIe®) 3.0 specification (Gen3). At the most recent PCI-SIG workshop, Stratix V GX FPGAs successfully passed all PCI-SIG compliance and interoperability tests, completing inclusion for Stratix V on all three generations of the Integrators Lists for PCIe. With Cyclone V and Arria V devices included on the 1.1 (Gen 1) and 2.0 (Gen2) lists, Altera’s entire 28 nm portfolio is now certified by the PCI-SIG as PCIe compliant for all three generations. (more) |
|
May 06, 2013
Altera Opens the World of FPGAs to Software Programmers with Broad Availability of SDK and Off-the-Shelf Boards for OpenCLAltera today announced the broad availability of its SDK for OpenCL and supported third-party production boards. Availability of the SDK for OpenCL enables software programmers to access the high-performance capabilities of programmable logic devices. Also part of today’s news, Altera announced a Preferred Board Partner Program, allowing third-party board vendors to work closely with Altera to design optimized production boards based on Altera’s programmable devices. (more) |
|
May 06, 2013
Altera Quartus II Software v13.0 Enables World’s Fastest FPGA DesignsAltera today announced the release of its Quartus® II software version 13.0, which delivers the highest levels of FPGA and SoC performance and designer productivity. Users targeting 28 nm FPGAs and SoCs will experience on average a 25 percent reduction in compile times. The most difficult-to-close designs targeting high-end 28 nm Stratix® V FPGAs will see compilation times slashed by 50 percent on average compared to the previous software release. (more) |
|
April 22, 2013
Altera Announces Availability of Cyclone V SoC Development KitAltera Corporation today announced the availability of its Cyclone® V SoC Development Kit, a development platform that enables hardware and software developers to accelerate their embedded systems design development. Developed in collaboration with ARM, this kit features the recently announced ARM® Development Studio 5 (DS-5™) Altera® Edition Toolkit software, the industry’s only FPGA-adaptive debugging software that enables designers to view the processor and FPGA portions of the device simultaneously. (more) |
|
April 15, 2013
Altera and TSMC Collaborate on 55 nm EmbFlash ProcessAltera and TSMC today announced a technology collaboration using TSMC’s 55 nm leading-edge Embedded Flash process technology. Programmable devices based on TSMC’s 55 nm EmbFlash target a wide range of low-power, high-volume applications in a variety of markets, including automotive and industrial. (more) |
|
April 10, 2013
Altera Demonstrates Industry’s First QPI 1.1 FPGA Home Agent for Enhanced Server CapabilitiesAltera today announced the industry’s first demonstration of an FPGA Home Agent enabled by the Intel QuickPath Interconnect (QPI) protocol 1.1. Connecting to Intel’s Sandy Bridge XEON processors, the demonstration leverages an Altera® Stratix® V FPGA configured as the Home Agent, and it supports both the Caching Agent and Home Agent in a Pactron Vigor Development Platform. This solution is ideal for designers of low-latency signal-processing, packet processing and embedded applications, such as high-frequency trading and big data that need higher computation performance-per-watt than traditional CPU configurations can deliver. (more) |
|
April 08, 2013
Altera Demonstrates Industry’s First 32-Gbps Transceiver with Leading-Edge 20 nm DeviceAltera today announced the company achieved another significant milestone in transceiver technology by demonstrating the industry’s first programmable device with 32-Gbps transceiver capabilities. The demonstration uses a 20 nm device based on TSMC’s 20SoC process technology. This achievement validates the performance capabilities of 20 nm silicon and is a positive indicator to the more than 500 customers in Altera’s early access program who are looking to use next-generation Altera devices in the development of performance demanding, bandwidth-centric applications. (more) |
|
April 05, 2013
Altera Showcases 4K Video Processing and Multichannel Video-over-IP at 2013 NAB ShowAltera is showcasing its latest broadcast solutions for 4K video processing and multichannel video-over-IP at the 2013 NAB Show in Las Vegas from April 8 to 11. Additionally, the company is demonstrating its Stratix® V Advanced Systems Development Kit, a PCIe® Gen3x16 plug-in card architected for 4K Ultra HD, equivalent to 16-channel 1080p60 video processing. (more) |
|
March 18, 2013
Altera Cyclone V GT FPGA Is Industry’s First Low-Power FPGA to Achieve Compliance for PCIe Gen2 at 5 GbpsAltera today announced its 28 nm Cyclone® V GT FPGA completed compliance testing with the PCI Express® (PCIe®) 2.0 specification. Available in production today, the Cyclone V GT FPGA is the industry’s first low-cost, low-power FPGA to achieve PCIe 2.0 interoperability with data rates of 5 Gbps. (more) |
|
March 14, 2013
Altera Demonstrates Solutions for Enabling OTN Systems Beyond 100G at OFC 2013Altera today announced it will demonstrate how its FPGA-based solutions are shaping the future of OTN applications at the Optical Fiber Communication Conference and Exposition (OFC) and the National Fiber Optic Engineers Conference (NFOEC) in Anaheim, Calif. on March 19 – March 21, 2013. (more) |
|
|
February 25, 2013
Altera Introduces FPGA-Based HSR/PRP Reference Design Targeting Smart Grid Automation EquipmentAltera today expanded its FPGA-based solutions targeting smart energy systems by announcing a High-availability Seamless Redundancy and Parallel Redundancy Protocol reference design targeting smart grid substation automation equipment. Developed jointly with Flexibilis Oy, a provider of networking equipment and technologies for wireless and wired applications, the IEC 62439-3-compliant reference design includes Flexibilis Redundant Switch (FRS) IP implemented on an Altera® low-power, low-cost Cyclone®-class FPGA or Cyclone V SoC. (more) |
|
January 28, 2013
JDSU Adopts Altera Stratix V GT FPGA for Production of Next-Generation Optical TestersAltera today announced the Stratix® V GT FPGA is shipping to JDSU for volume production of the company’s next-generation ONT solutions. JDSU is leveraging Altera’s high-end 28 nm FPGA in its ONT-600 series to deliver the first test solution targeting CFP2 100G OTN environments. (more) |
|
|
December 12, 2012
Altera and ARM Announce Industry’s First FPGA-Adaptive Embedded Software ToolkitAltera and ARM announced that, with a unique agreement, the companies have jointly developed a DS-5 embedded software development toolkit with FPGA-adaptive debug capabilities for Altera SoC devices. The ARM® Development Studio 5 (DS-5™) Altera Editiontoolkit is designed to remove the debugging barrier between the integrated dual-core CPU subsystem and FPGA fabric in Altera SoC devices. By combining the most advanced multi-core debugger for the ARM architecture with the ability to adapt to the logic contained in the FPGA, the new toolkit provides embedded software developers an unprecedented level of full-chip visibility and control through the standard DS-5 user interface. (more) |
|
|
December 12, 2012
Altera Ships Its First SoC DevicesAltera today announced the first shipments of its 28 nm SoC devices, whichcombine a dual-core ARM® Cortex™-A9 processor systemwith FPGA logic on a single device. Altera SoCs include several distinctive features that enable developers in the wireless communications, industrial, video surveillance, automotive and medical equipment markets to create custom SoC variants optimized for system power, board space, performance and cost requirements. The first devices Altera is shipping are low-power, low-cost Cyclone® V SoCs. (more) |
|
November 19, 2012
Altera Quartus II Software Version 12.1 Accelerates System Development with Enhanced High-Level Design FlowsAltera today announced the release of its Quartus® II software version 12.1, the industry’s number one design suite in performance and productivity for CPLD, FPGA, SoC FPGA and HardCopy® ASIC designs. The latest version strengthens the Quartus II software’s high-level design environment by continuing to ease traditional hardware development tasks so users can maximize productivity while benefiting from the broad range of leading-edge capabilities of Altera devices. (more) |